1. Technical Field
The invention relates generally to communications devices; and more particularly, it relates to power management in communications devices.
2. Related Art
Computer interconnectivity and communication technologies have rapidly advanced over the last few decades. In particular, Local Area Networks (LANs) are now common and serve as building blocks for much larger networks. LANs include various devices that perform communication functions; these devices include bridges, switches, routers, hubs, gateways, etc. These communication devices usually include a number of Network Interface Cards (NICs) that service one or more interfaces to other LAN devices. In some of these devices, NICs communicate with one another across communication paths located on the backside of a shared housing, such communication paths referred to generally as the back plane. The back plane serves as a data highway, providing communications paths for these interface cards to communicate with each other.
Each NIC typically includes a number of integrated circuits. These integrated circuits (computer integrated circuits) perform various communication and interface functions and support communications across the backplane. For example processor A residing on NIC A may communicate with processor B residing on NIC B via a communication path that includes the backplane, additional circuitry, and routing paths located on the NIC A and NIC B.
For equipment of differing vendors to interact properly, NICs typically operate according to at least one industry standard. The NIC typically interfaces to the LAN via a networking standard and interfaces to a host computer or other NECs via a second operating standard (across the back plane). An example of this second operating standard is the PCI Local Bus standard. The PCI Local Bus Standard sets forth the operating requirements for devices that communicate across a PCI Local Bus. Generally speaking, the PCI Local Bus is a parallel bus that services a variety of cards in addition to NICs, e.g., sound cards, gaming device cards, parallel port cards, and serial port cards, among others. Although the PCI Local Bus standard provides significant direction for communication interface, some operational aspects not addressed, e.g., power management.
In most implementations, power management is performed at lower levels of operation, e.g., Basic Input Output System (BIOS) operations, System Management Mode (SMM) code operations, etc. These operations are typically platform unique. Unfortunately, power managements performed by BIOS and SMM operations are inherently problematic in computer networking applications because they have no knowledge regarding the busy or idle status of a managed device. Such is the case because the operating system manages the busy/idle status of managed NIC(s). Thus, in computer networking applications, it makes sense to place the responsibility for power management with the operating system. However, because the computer hardware managed by the operating system is typically proprietary, the operating system generally cannot perform power management for the hardware devices of all vendors.
These problems are particularly inherent in NICs whose back planes operate according to the PCI Local Bus Specification. The PCI Local Bus Specification addresses the power consumption requirements for cards (including network cards) that interface to a PCI compliant bus. For example, the PCI Local Bus Specification sets forth 375 mA as the maximum current consumption for a Network Interface Card (NIC) connecting to a PCI Local Bus. However, the PCI Local Bus Specification standard does not dictate how this power requirement is to be met by the various integrated circuits contained on the NIC.
As NICs include more integrated circuitry that is located in increasingly smaller surface areas, it becomes harder to meet the power requirement imposed by the PCI Local Bus Standard. For example, in modern day communication integrated circuits, it is not uncommon to place the entire functionality for a transmitter/receiver (i.e., a transceiver) on a single integrated circuit. Furthermore, technology has advanced to the point where the circuitry for several transceivers may reside on a single processor. These advances not only increase the functionality of a NIC containing such integrated circuitry, but they also reduce the overall cost required to service all of the functionality.
However, a hard limitation for placing multiple transceivers (or increased functionality) on a single integrated circuit relates to power consumption. Since the PCI specification places an upper limit on the power that may be consumed by a compliant NIC, the limitations imposed thereby may limit the functionality that may be provided by a single NIC.
Further limitations and disadvantages of conventional and traditional systems will become apparent through comparison of such systems with the invention as set forth in the remainder of the present application with reference to the drawings.